Recently, high speed operation as well as large scale integration and high packing density in an integrated circuit has been strongly demanded. For realization of this demand, an improvement of the high speed operation on a semiconductor device such as a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) which is merely called transistor hereafter or the like has been important. For operation speed of the semiconductor device, for example, switching time Tpd of an inverter is generally represented as k×CV/I, where C is parasitic capacitor of the transistor, I is driving force, V is operation voltage and k is proportional constant.
Necessity for enlarging the driving force I or lowering the parasitic capacitor C is derived from the formula to obtain high speed operation, namely lowering the Tpd. The parasitic capacitor of the transistor is composed of a gate capacitor, a diffusion capacitor, a fringe capacitor and an overlapping capacitor. Shortening a gate length of the transistor leads to decreasing a resistance of a channel region so as to be able to increase the driving force I and to lower the gate capacitor.
However, shortening the gate length of the transistor causes a problem such as lowering a threshold voltage or being increased with an off current (leakage current) due to a short-channel effect.
As a technique for controlling the short-channel effect, a halo ion-implantation technique has been proposed. For example, Japanese Patent Publication (Kokai) No. 2005-327848 discloses a method for the technique. In the Patent Publication, after forming a source/drain region with a low concentration, ion-implanting a same conductive-type impurity as an impurity into the channel area from a direction with an angle for perpendicular to the semiconductor substrate using a gate electrode as a mask. The ion-implantation increases a channel concentration and shallows a channel depth so that the short-channel effect is suppressed.
However, the halo ion-implantation in this method is performed not only into a lower channel region of an end of the gate electrode for suppressing the short-channel effect but also into all over the source/drain region. Accordingly, all over the source/drain region becomes a high concentration which is the same as the channel area of the semiconductor substrate.
Therefore, increasing the diffusion layer capacity of the source/drain region and the resistance of the diffusion layer causes deterioration of the driving force. As a result, the switching operation Tpd of the transistor is also deteriorated.